1. Field of the Invention
The present invention relates to an evaluation technique, and more specifically, to a technique performing evaluation on a logic circuit by logic simulation.
2. Description of Related Art
An emulator has been often used for evaluation of an electronic device. The emulator is a device or software which totally imitates a device opposingly connected to the electronic device (hereinafter referred to as opposing connection device or opposed device) which is an evaluation object, and the emulator can operate in real time.
FIG. 13 corresponds to FIG. 1 in Japanese Unexamined Patent Application Publication No. 2002-232516, and shows an evaluation system employing an emulator. This system evaluates an evaluation object device 2. In this system, an emulator 1 and an evaluation object device 2 are connected through a network 3.
The emulator 1 includes a generating means 1a, a decision means 1b, and a transmission means 1c. The generating means 1a responds to an operation entry from a user designating a response packet with respect to a request packet to generate emulation data 1d. The emulation data 1d defines a behavior regarding communication of other devices (opposed device) that can be connected to the network 3, and the request packet and the response packet are registered to the emulation data while being made correspondent to each other. Upon receiving of the request packet from the evaluation object device 2, the decision means 1b refers to the emulation data 1d to decide the response packet corresponding to the request packet. The transmission means 1c transmits the response packet decided by the decision means 1b to the evaluation object device 2 via the network 3.
In this system, it is possible to set the response packet with respect to the request packet output from the evaluation object device 2 in accordance with the input from the user as desired. In summary, any emulation data 1d can be set by inputting any operation of the opposed device by the user. For example, it is possible to set the response packet in which the operation of the opposed device that may be operated in cooperation with the evaluation object device 2 is imitated. The emulator 1 transmits the response packet with respect to the request packet from the evaluation object device 2 in accordance with the definition of the emulation data 1d. Accordingly, it is possible to evaluate an accuracy of a cooperation behavior performed by the evaluation object device 2 with the opposed device.
On the other hand, in an area of developing the logic circuit, the operation model is constructed by a logical description such as a logical description language (Verilog/VHDL, SystemC, C and so on) of function level or register transfer level (RTL) to perform the logic simulation by employing the operation model in order to check logic function or timing of the designed logic circuit. By this technique, the validity of the logic circuit can be evaluated by the software before implementing the circuit in FPGA (Field Programmable Gate Array) or the like, and thus development burden can be relieved. Hereinafter, software performing the logic simulation is called logic simulator. Since the logic simulator aims to check the logic function or the timing of the logic circuit, the logic simulator generally cannot behave in real time.
The evaluation of the validity of the logic circuit needs to be executed on various types of opposed devices that may be connected with the logic circuit. In order to execute this evaluation by the logic simulation, it is preferable to use the logical description or the operation model of these opposed devices, or in some cases the software for performing the operation model or the like. However, they are owned by a developer and not available to the public, and therefore it is practically impossible to obtain all of them.
On the other hand, even if the operation model of the opposed device is difficult to obtain, since the actual devices are commercially available, it is possible to easily obtain the devices. It is desired to enable the evaluation of the logic circuit by executing the logic simulation with the actual device of the opposed device.
Now, we consider a case where the evaluation technique by emulation shown in FIG. 13 is applied to the logic simulation of the logic circuit. The schematic configuration of the system shown in FIG. 14 is one example of such a case.
As shown in FIG. 14, an evaluation device 30 includes a logic simulator 33, and is connected to an opposed device 10 which is an actual device through a network 20. The logic simulator 33 includes a logical description which is not shown, and the operation model of the logic circuit formed by the logical description is an evaluation object.
A transceiver 31 in the evaluation device 30 receives a request packet REQ from the opposed device 10 and sends back to the opposed device 10 a response packet RES stored in the simulation data 32 and corresponding to the REQ. The simulation data 32 stores the request packet REQ and the response packet RES while being made correspondent to each other. The simulation data 32 is formed by the logic simulator 33 in response to the operation entry from an external device.
By having such a configuration, it is possible to evaluate the logical description included in the logic simulator 33 using the actual device of the opposed device.
Since the response packet RES is obtained by performing the simulation by inputting the request packet REQ of the opposed device 10 to the logic simulator 33 in a range in which the operator can imagine in the system shown in FIG. 14, when the evaluation is performed with the opposed device 10 which is an actual device, there may be some cases in which the response packets RES with respect to the request packets REQ from the opposed device 10 are not registered in the simulation data 32.
If the response packet RES corresponding to the request packet REQ from the opposed device 10 is not registered in the simulation data 32 and the evaluation device 30 does not respond, the opposed device 10 may determine that the communication may not be normally performed by the evaluation device 30 due to the abnormality of the protocol. Then the opposed device 10 may stop communication or reset the network 20, thus the evaluation cannot be continued any more.
Alternatively, it may seem possible to obtain the response packet RES with respect to the request packet REQ by forcing the logic simulator 33 to perform the logic simulation by the operation entry from the external device when the response packet RES with respect to the request packet REQ from the opposed device 10 is not registered in the simulation data 32. However, as stated above, the logic simulator generally cannot behave in real time. Therefore, as shown in FIG. 15, the time from reception of the request packet REQ to the time at which the evaluation device 30 can transmit the response packet RES as a result of performing the logic simulation by the logic simulator 33 to obtain the response packet RES exceeds the maximum value of the response time defined by the standard. As a consequence, the same problem as described above is caused which is the same as the case in which the evaluation device 30 does not respond.